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dc.contributor.authorKer, Ming-Douen_US
dc.contributor.authorWu, Chien-Huaen_US
dc.date.accessioned2019-04-02T06:04:44Z-
dc.date.available2019-04-02T06:04:44Z-
dc.date.issued2006-01-01en_US
dc.identifier.issn0271-4302en_US
dc.identifier.urihttp://hdl.handle.net/11536/150913-
dc.description.abstractA LVDS receiver with new data recovery design for flat-panel-display (FPD) link is presented. The new delay-selecting technique is used in LVDS receiver to reduce the circuit complexity and to save chip power for cost-efficient applications. The proposed LVDS receiver with an operation data rate of 1.25 Gb/s has been successfully verified in a 0.13-mu m CMOS process, which can fully support the operation of FPD link with UXGA resolution.en_US
dc.language.isoen_USen_US
dc.titleDesign on LVDS receiver with new delay-selecting technique for UXGA flat panel display applicationsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGSen_US
dc.citation.spage5155en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000245413505110en_US
dc.citation.woscount2en_US
Appears in Collections:Conferences Paper