標題: 氮化鎵金屬絕緣層半導體高速電子遷移率電晶體之閘極介電質優化
Gate Dielectric Optimization of High Performance GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors.
作者: 楊上頡
郭浩中
陳瓊華
Yang, Shang-Chieh
Kuo, Hao-Chung
Chen, Chyong-Hua
光電工程研究所
關鍵字: 氮化鎵;高速電子遷移率電晶體;Gallium nitride;HEMT
公開日期: 2017
摘要: 近年來由於磊晶技術的進步與材料科學的突破,成長在矽基板上的氮化鎵(GaN)高速電子遷移率電晶體(HEMTs)開始應用於商用高功率電子元件上。由於氮化鎵高速電子遷移率電晶體具有濃度較高的二維電子氣濃度(> 10^13 cm-2),使其開啟電阻(Ron)低於傳統矽基功率電晶體約三個數量級,可降低系統的體積與成本。然而,氮化鎵晶體的高缺陷密度以及元件製程造成的表面損傷,將導致氮化鎵高速電子遷移率電晶體在操作時產生非預期的失效現象或可靠度不佳。因此,磊晶及製程上仍有許多研究可以探討,以改善元件效能與可靠度。 本論文使用兩種方式改善元件的諸多性能。第一部分使用原子層沉積系統(ALD)結合內建遠程電漿(in-situ remote plasma),先以氫氣/氨氣電漿去除氮化鎵表面原生氧化物,並在腔內成長氮化鋁(AlN)表面鈍化層以及氧化鋁(Al2O3)高介電係數(high-k)閘極介電層,製作成金屬-介電質-半導體(MIS)結構的高速電子遷移率電晶體,其電流崩塌效應可被抑制僅 22.1%。第二部分在磊晶過程中使用內建氮化矽(in-situ SiNx)覆蓋在氮化鎵表層上,以減少介面的缺陷數量,當元件汲 極經過超過 200 伏特偏壓後,電流崩塌效應可以被減低至 7%,此外,元件的崩潰電壓可以高達 400 伏特。 本論文以兩種不同的半導體製程技術,提供減低電流崩塌以及提高汲極崩潰電壓的解決方案,使氮化鎵高速電子遷移率電晶體能克服諸多材料上的限制,推廣進入商用化的階段。
Recent progress in high power field-effect transistors (FETs) was focused on GaN-based wide band-gap (WBG) semiconductors. Recent progress in high power fieldeffect transistors (FET) focused on GaN-based wide band-gap semiconductors. GaN-based high electron mobility transistor (HEMTs) have demonstrated great potential due to their high breakdown electric field, low on-state resistance (Ron) and high thermal stability. Therefore, GaN-based HEMT provides significantly better performances compared with traditional Si-based power device, leading to a smaller device area as well as cost reduction. However, high defect densities and surface damages under the device process result in unreliable device performance of GaN HEMTs during high power switching. Therefore, it is essential to improve device performance through fabrication process or epitaxial technology. In this thesis, we report two methods to improve device performance and reliability. In the first part, we report a surface passivation technology by plasma enhanced atomic layer deposition (PEALD). Prior to deposit dielectric layer on GaN HEMTs, the H2/NH3 plasma pre-treatment was employed to remove the native gallium oxide. Following the in-situ ALD-AlN/Al2O3 was deposited and passivated the surface, leading to a 22.1% of current collapse. The surface passivated HEMT enabled a breakdown voltage to 687 V at high temperature (150oC), promising a good thermal reliability under high power operation. In the second part, we report a GaN HEMT with MOCVD-grown in-situ SiNx. The in-situ SiNx passivated the GaN surface, leading to a 7% of current collapse. Furthermore, the breakdown voltage (BV) can be increased to 400 V, promising a good stability under high voltage operation. We can improve the current collapse and the breakdown voltage through these two methodologies. These approaches can be applied to develop novel power electronic devices with high performance, yielding a device that is reliable in power device applications.
URI: http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070450557
http://hdl.handle.net/11536/142470
顯示於類別:畢業論文