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dc.contributor.authorTseng, Yu-Chengen_US
dc.contributor.authorChang, Nelson Yen-Chungen_US
dc.contributor.authorChang, Tian-Sheuanen_US
dc.date.accessioned2014-12-08T15:23:24Z-
dc.date.available2014-12-08T15:23:24Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-4244-3827-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/16391-
dc.description.abstractIn disparity estimation, belief propagation can deliver better disparity quality than other algorithms but suffer from large storage cost, especially at the message update processing. To reduce the storage cost, this paper proposes low-memory cost architectures for the message update PE to satisfy the real-time application. We propose four architectures which are post-normalization, shadow buffer, no memory, and no memory+double PE architectures. Compared to the previous design, the proposed no memory+double PE architecture can save 28% of the hardware cost at most for 320x240@30fps and 64 disparity levels.en_US
dc.language.isoen_USen_US
dc.titleLow-Memory Cost Belief Propagation Architecture for Disparity Estimationen_US
dc.typeProceedings Paperen_US
dc.identifier.journalISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5en_US
dc.citation.spage153en_US
dc.citation.epage156en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000275929800039-
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