標題: Efficient Analog Layout Prototyping by Layout Reuse with Routing Preservation
作者: Chin, Ching-Yu
Pan, Po-Cheng
Chen, Hung-Ming
Chen, Tung-Chieh
Lin, Jou-Chun
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2013
摘要: To strive for better circuit performance on analog design, layout generation heavily relies on experienced analog designers' effort. Other than general analog constraints such as symmetry and wire-matching are commonly embraced in many proposed works, analog circuit performance is also sensitive to routing behavior. This paper presents a CDT-based layout extraction to preserve routing behavior of the reference layout. Furthermore, a generalized layout prototyping methodology is proposed based on the layout extraction to achieve routing reuse. The proposed layout prototyping is applied to a variable-gain amplifier and a folded-cascode operational amplifier for both migration and prototypes generation. Experimental results show that our approach effectively reduces design cycle time and simultaneously produces reasonable performance.
URI: http://hdl.handle.net/11536/23712
ISBN: 978-1-4799-1071-7
ISSN: 1933-7760
期刊: 2013 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD)
起始頁: 40
結束頁: 47
Appears in Collections:Conferences Paper