應用於無線區域網路與藍芽系統之全積體化低功率低相位雜訊整數型及三角積分之分數型頻率合成器

Abstract

本論文中主要提出三角積分之分數型頻率合成器，另外還提出兩種不同架構之整數型頻率合成器及兩種不同架構之壓控振盪器，這些電路皆應用於無線區域網路及藍芽無線通訊上。 首先三角積分之分數型頻率合成器，利用0.18微米CMOS製程實現此頻率合成器，以低功率消耗及低相位雜訊為設計主要考量。量測結果如下：可調頻寬為2381 ~ 2606兆赫茲(於頻率控制訊號為10時)，相位雜訊為-118.4分貝/赫茲@1兆赫茲，總功率消耗22.9毫瓦，鎖定時間為30微秒，寄生雜頻較主頻低56.5分貝。 接下來是利用0.18微米CMOS製程實現兩個整數型頻率合成器：第一個為寬頻之頻率合成器，其量測結果如下：可調頻寬為2178 ~ 2629兆赫茲(於頻率控制訊號為011時)，相位雜訊為-108.8分貝/赫茲@1兆赫茲，總功率消耗38.4毫瓦，鎖定時間為40微秒，寄生雜頻較主頻低26.15分貝；第二個為低功率、低相位雜訊之頻率合成器，其量測結果如下：可調頻寬為2399 ~ 2633兆赫茲(於頻率控制訊號為10時)，相位雜訊為-114.0分貝/赫茲@1兆赫茲，總功率消耗28.3毫瓦，鎖定 時間為90微秒，寄生雜頻較主頻低41.50分貝。 最後利用0.35微米SiGe BiCMOS製程實現寬頻、低功率之壓控振盪器，量測結果如下：可調頻寬為4310 ~ 5430兆赫茲，相位雜訊為-114.1分貝/赫茲@1兆赫茲，總功率消耗16.7毫瓦。另外利用0.18微米CMOS製程實現四相位壓控振盪器，利用基底端做訊號耦合。量測結果如下：可調頻寬為2093 ~ 2206兆赫茲(於頻率控制訊號為100時)，相位雜訊為-124.3分貝/赫茲@1兆赫茲，總功率消耗19.8毫瓦。

This thesis contents a sigma-delta fractional-N synthesizer mainly. Besides, it contents two integer-N synthesizers and two voltage-controlled oscillators. These circuits are implemented for WLAN and Bluetooth applications. First, we describe the sigma-delta fractional-N frequency synthesizer, using 0.18µm CMOS technology. Design consideriation contants low power consumption and the low phase noise. The measurement results are listed as following: the oscillation frequency is tunable between 2381 ~ 2606-MHz (as frequency bank is 10), phase noise is -118.4dBc/Hz @1-MHz offset, the power consumption is 22.9mW, locking time is approximately 30µs, and spurious tone is -56.5dBc. Then we describe two integer-N frequency synthesizers, using 0.18µm CMOS technology. One is wide tuning range frequency synthesizer. The measurement results are listed as following: the oscillation frequency is tunable between 2178 ~ 2629-MHz (as frequency bank is 011), phase noise is -108.8dBc/Hz @1-MHz offset, the power consumption is 38.4mW, locking time is approximately 40µs, and spurious tone is -26.15dBc. Another is low power, low phase noise range frequency synthesizer. The measurement results are listed as following: the oscillation frequency is tunable between 2399 ~ 2633-MHz (as frequency bank is 10), phase noise is -114.0dBc/Hz @1-MHz offset, the power consumption is 28.3mW, locking time is approximately 90µs, and spurious tone is -41.50dBc. Finally we describe a wide tuning range, low power VCO, using 0.35µm SiGe BiCMOS technology. The measurement results are listed as following: the oscillation frequency is tunable between 4310 ~ 5430-MHz, phase noise is -114.1dBc/Hz @1-MHz offset, and the power consumption is 16.7mW. Besides we also describe a low power, low phase back-gate quadrature VCO, using 0.18µm CMOS technology. The measurement results are listed as following: the oscillation frequency is tunable between 2093 ~ 2206-MHz (as frequency bank is 100), phase noise is -124.3dBc/Hz @1-MHz offset, and the power consumption is 19.8mW.