IEEE 802.16a 分時雙工正交分頻多重進接下行導引訊號輔助式通道估測之技術與數位訊號處理器軟體實現

Abstract

正交分頻技術近來因為能在行動環境中穩定高速傳輸而廣受注目，IEEE 802.16a 即是一個基於正交分頻多重進接技術用於無線區域網路和大都會網路的標準。 本論文主要在討論IEEE 802.16a下行通道估測的方法以及數位訊號處理器軟體實現。 我們使用最小平方差的估測器來估計在導訊上的通道頻率響應，因為硬體的計算方便。而內插的方法我們則研究了線性內插、二次式內插。而在用時域的資料改善的方法有下列兩種：二維內插法、以及最小平均平方差適應 (LMS adaptation）。我們的在靜態以及瑞雷通道上模擬。結合線性內插和二維內插法，我們得到較好的表現，而且運算複雜度也比較低，所以決定在數位訊號處理器軟體上實現。 我們將通道估測的技術以軟體實現在 Texas Instruments (TI) 公司製造型號為TMS320C6416 的數位訊號處理器上（DSP）。此處理器的操作平台為Innovative Integration公司製名為Quixote的cPCI卡。因為我們所使用的DSP是專為定點運算所設計的，所以浮點數運算是很費時的。有三種方法可以加速運算速度：改變資料型態、程式語法的改良及使用intrinsic程式。所謂的改變資料型態就是把一開始的浮點數運算先改成32-bit的定點運算，再改成16-bit的定點運算。程式語法的改良則是把許多耗時的指令做修正，如if-else的指令。Intrinsic程式是一種直接對應到C64x指令集的程式，可以改善我們C程式的表現。在依照上述步驟對原本浮點數運算的程式做改良後，我們得到了很大的進步，雖然與理論上運算的複雜度相比，成效最高只到49%。 不過在線性內插程式方面，我們至少達到了只需0.52個symbol time就能完成的速度。

OFDM (orthogonal frequency division multiplexing) technique has drawn much interest recently for its robustness in the mobile transmission environment and its high transmission data rate. IEEE 802.16a is a wireless local and metropolitan area networks standard which is based on OFDMA (orthogonal frequency division multiple access) technique. This work considers two main subjects of the downlink channel estimation under the specifications of IEEE 802.16a, the interpolation schemes and the DSP implementation. We use LS estimator for estimations of pilot carriers because of its low computational complexity. We study the linear, the second-order interpolations in frequency domain and the LMS adaptation algorithm, the two-D interpolation in time domain. We did the simulation on both static and Rayleigh fading channels. Combination of linear interpolation and 2-D interpolation are chosen to be implemented on DSP board for its low computational complexity. Our implementation is software-based, employing Texas Instruments’ TMS320C6416 digital signal processor (DSP) housed on Innovative Integration’s Quixote cPCI card. For the fixed-point DSP operation environment, floating-point operation is absolutely time-consuming. There are three ways to accelerate the DSP execution speed: changing data type, code style optimization, and using intrinsic functions. Changing data type means we replace the original floating-point operation with 32-bit fixed-point operation and then 16-bit fixed-point operation at last. Code style optimization is to modify the time-wasting parts of code, such as spared if-else instruction. Intrinsic functions are special functions that map directly to C64x instructions, to optimize our C code performance. The execution cycles of each function is improved a lot after optimized although compared with the theoretical execution cycles, the efficiency is 49% at most. At least, we reach the 0.52 multiples of real time needed per symbol in linear interpolation.