Optimal data mapping for motion compensation in H.264 video decoding

doi:10.1109/SIPS.2007.4387599

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Yu, Guo-Shiuan	en_US
dc.contributor.author	Chang, Tian Sheuan	en_US
dc.date.accessioned	2014-12-08T15:10:00Z	-
dc.date.available	2014-12-08T15:10:00Z	-
dc.date.issued	2007	en_US
dc.identifier.isbn	978-1-4244-1221-1	en_US
dc.identifier.issn	1520-6130	en_US
dc.identifier.uri	http://hdl.handle.net/11536/7634	-
dc.identifier.uri	http://dx.doi.org/10.1109/SIPS.2007.4387599	en_US
dc.description.abstract	Long initial access cycles of SDRAM are the major performance burden of motion compensation in a video decoder. To minimize its effect while improve overall available memory bandwidth, this paper presents an optimal data mapping scheme for motion compensation in H.264 video coding. This scheme allocates the video data into suitable address and bank according to the access characteristics of SDRAM access and address transition in motion compensation. The resulted allocation can reduce the required bandwidth of motion compensation by 36% when compared to the previous design for 525SD video sequences.	en_US
dc.language.iso	en_US	en_US
dc.title	Optimal data mapping for motion compensation in H.264 video decoding	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.doi	10.1109/SIPS.2007.4387599	en_US
dc.identifier.journal	2007 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS, VOLS 1 AND 2	en_US
dc.citation.spage	505	en_US
dc.citation.epage	508	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000255189800093	-
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