Dual-mode Viterbi decoder design for cellular mobile

Abstract

The Viterbi algorithm is widely applied for communication to derive the maximun-likehood sequence estimates of transmitted data on channels with intersymbol interference (ISI) and/or coding. In this paper, we provide a VLSI design of Viterbi decoder for IS-54. Design features includes: switchable (2,1,5),(4,1,5) coder design, data inter-leaving, soft - decision. For hardware constrain, area efficiency is of great concern in handset design. Hence, optimized area efficient design is imple-mented.