Suspended Ge Gate-All-Around Nanowire nFETs with Junction Isolation on Bulk Si

Abstract

Replacing Si channel with selective epi-Ge in mainstream bulk FinFETs can be a cost-effective solution for sub-7 nm node, but is facing severe challenges because of poor isolation to Si substrates. We demonstrate a suspended Ge gate-all-around (GAA) nanowire nFET (nNWFET) technology with junction isolation on bulk Si. Because of the low junction leakage provided by an embedded Si junction, improved electrostatics of GAA structure utilizing surrounding high-mobility {111} surfaces, and a dislocation-free channel by selectively removing the defective Ge/Si interface, a high current on/off ratio (I-ON/I-OFF of 5x10(5), which is comparable to the state-of-the-art Ge nFETs on Ge-on-insulator (GeOI), is first demonstrated using a bulk FinFET-compatible process.