A micro-architecture simulator for multimedia stream processor
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10.1109/ICECS.2006.379902
Abstract
Recent research has proposed using stream processors for media applications. Since a programmable Stream Processor could utilize various hardware micro-architectures for diverse media applications, decision on a suitable micro-architectures to achieve efficiencies and hardware cost is critical. In this paper, a micro-architecture simulator for stream processor is implemented. The simulator evaluate the performance of media application executed on various micro-architectures, and then to analyze the utility rate of hardware and consumption of memory. By comparing the performance of media application executed on diverse micro-architectures, the optimized hardware micro-architecture can be determined for specific application and suitable micro-architecture of Stream Processor can be implemented on later VLSI for different targeting systems.