Low power CMOS wideband receiver design

Abstract

A low power CMOS receiver for ultra-wideband (UWB) wireless applications is presented. The low-noise amplifier (LNA) building block employing stagger tuning technique consists of two common-source stages with different resonance frequencies to achieve low power consumption and wide operating bandwidth. In addition, the variable gain amplifier (VGA) follows the passive mixer employs a novel wide-range pseudo-exponential circuit topology. This work was implemented in 0.18-mu m CMOS process exhibits 280-MHz bandwidth and draws 27.4 mA on average from a 1.8-V supply. The receiver has a minimum noise figure of 2.6 dB, and maximum IIP3 of -33 dBm across the UWB group 1 bands.