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學術出版;;Publications
研究計畫;;Research Plans
高密度電子構裝接合與測試載具之開發---以SPICE對積體電路與構裝基板之高效率熱模擬與電性分析(I)
高密度電子構裝接合與測試載具之開發---以SPICE對積體電路與構裝基板之高效率熱模擬與電性分析(I)
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Date
1997
Authors
張隆國
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Keywords
構裝
,
電導係數
,
熱傳導率
,
多晶片模組
,
Packaging
,
Electrical conductivity
,
Thermal conductivity
,
MCM
,
SPICE
Citation
URI
https://www.grb.gov.tw/search/planDetail?id=271930&docId=48506
https://ir.lib.nycu.edu.tw/handle/11536/95536
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