| Title: | 適用於10Gb/S有線通訊之類比前端積體電路設計技術 Analog Front-End IC Design for 10Gb/S Wireline Communication Applications |
| Authors: | 蔡嘉明 Tsai Chia-Ming 國立交通大學電子工程學系及電子研究所 |
| Issue Date: | 2009 |
| Gov't Doc #: | NSC98-2221-E009-136-MY2 |
| URI: | http://hdl.handle.net/11536/101407 https://www.grb.gov.tw/search/planDetail?id=1898760&docId=314439 |
| Appears in Collections: | Research Plans |
- 適用於10Gb/s有線通訊之類比前端積體電路設計技術 / 蔡嘉明;Tsai Chia-Ming
- 光通訊類比前端積體電路設計 / 蔡嘉明;Tsai Chia-Ming
- 光通訊類比前端積體電路設計 / 蔡嘉明;Tsai Chia-Ming
- Simultaneous Generation and Transmission of 60-GHz Wireless and Baseband Wireline Signals With Uplink Transmission Using an RSOA / Jiang, Wen-Jr;Lin, Chun-Ting;Shih, Po-Tsung;He, Li-Ying Wang;Chen, Jyehong
- 奈米CMOS之高性能類比數位混合信號關鍵電路設計技術---總計畫 / 柯明道;KER MING-DOU
- A 1.8-V 10-Gb/s fully integrated CMOS optical receiver analog front-end / Chen, WZ;Cheng, YL;Lin, DS
- 10-Gb/s modulator drivers with local feedback networks / Li, DU;Tsai, CM
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