| Title: | 單晶片系統驗證之核心技術開發---子計畫二：針對單晶片系統界面協定之驗證(III) On Interface Protocol Verification for SoC(III) |
| Authors: | 周景揚 JOU JING-YANG 國立交通大學電子工程學系及電子研究所 |
| Issue Date: | 2007 |
| Gov't Doc #: | NSC96-2220-E009-008 |
| URI: | http://hdl.handle.net/11536/102968 https://www.grb.gov.tw/search/planDetail?id=1463653&docId=262307 |
| Appears in Collections: | Research Plans |
