| Title: | 超高通道與解析度微大腦皮質訊號擷取系統晶片封裝的研發---子計畫三：超高通道與解析度腦神經訊號擷取電路設計佈局及功耗優化 Circuit/Physical Design and Power Optimization for Mega-Channel Ultra-High-Density Neural Signal Recording Circuits |
| Authors: | 莊景德 Chuang Ching-Te 國立交通大學電子工程學系及電子研究所 |
| Issue Date: | 2014 |
| Gov't Doc #: | MOST103-2221-E009-202-MY3 |
| URI: | http://hdl.handle.net/11536/103075 https://www.grb.gov.tw/search/planDetail?id=8343712&docId=442914 |
| Appears in Collections: | Research Plans |
