應用於異質周遭感測器之物聯網路由器的動態資料管理系統

Abstract

由於現今物聯網的格局愈來愈大，感測器所感測到大量且多樣化的資料使得整個系統在蒐集以及儲存資料上面遇到困難，對於物聯網裡的路由器而言，一個具有高頻寬以及大量儲存空間的記憶體系統是必需的。而在物聯網路由器當中，先進先出記憶體扮演著大量資料蒐集並暫存的最直接且關鍵的角色，而且它大大的影響整體路由器的資料讀取速度，因此我們提出了一個動態的資料管理單元取代傳統的先進先出記憶體來增進整體路由器的資料讀取速度。此外，由於在物聯網系統當中的低功率訴求，我們也將考慮低功率的設計方案。 我們所提出的電路是運用Synopsys Design Compiler來做實現，採用台積電90奈米製程並且運作在50MHz的時脈之下，在功率的量測上，我們則使用功率模組來做功率消耗的模擬。在少量資料負載、中量資料負載和大量資料負載時，我們提出的電路相較傳統分散式先進先出記憶體少了57.9%、60.2% 和 44.1% 的運算時間，另外在面積上也多出了3.2% ，功率消耗上則少了 22.3% 。

Since the larger scale of IoT applications nowadays, the great number and high diversity of sensor data make the whole system difficult to collect and store these data. A memory system with high bandwidth and large storage is on necessary in IoT routers. Furthermore, the FIFO memory is at the first place of the IoT routers to access lots of sensor data that can have a great influence on the performance of the whole router. As the result, a dynamic data management unit is proposed as the FIFO memory to increase the performance. Besides, the low-power issue is also considered in our design to achieve the low-power budget in IoT routers. Our design is implemented via Synopsys Design Compiler based on TSMC 90nm technology at 50MHz. And the power consumption is simulated by using the power model. The latency of our design in low, medium and high injection load is 57.9%, 60.2% and 44.1% less than the distributed FIFO. The area of our design is 3.2% larger and the average power is 22.3% less than the distributed FIFO.