基於硬體計數器之微處理器靜態功耗估計

Abstract

如何在能源有限的嵌入式環境中取得效能與耗能平衡一直是重要的研究議 題,因此有不少人提出即時性電源管理的機制。而為了提供最佳電源管理效果, 能得知即時耗電資訊是必要的。即時評估耗電的方法大致可分為兩種,一種是透 過電源感測器,另一種是基於硬體計數器所建立的耗電模型。本論文屬於基於硬 體計數器的耗電模型。過去有許多研究專注於增進耗電模型準確率,但大多數的 情況下,動態耗電佔據大部分總體耗電,然而隨著互補式金屬氧化物半導體製程 技術演進,靜態耗電反而成了總體耗電的主角。微處理器劇烈的工作溫度變化, 大大影響了靜態耗電,而過去評估耗電的模型也顯得不再適用。 本論文分別對影響動態耗電以及靜態耗電的硬體計數器進行分析,以提高評 估耗電的準確率,並提出基於硬體計數器的耗電模型。

The tradeoff between power consumption and performance of microprocessor is a major consideration issue in embedded devices with limited energy resource. Therefore, several power management technologies are proposed to reduce power consumption at runtime. These technologies require the status of power consumption at runtime to manage strategy. The techniques can be divided into two major categories, which are meter-based and counter-based, respectively. In this thesis, we focus on the domain of counter-based evaluation, which is computing power consumption based on the information of performance counters at runtime. To improve the accuracy of counter-based evaluation, several power models are proposed in last decades. Moreover, most of the previous studies consider dynamic power as the major factors in the power models. However, the static power dominates the power consumption of microprocessor while complementary metal-oxide-semiconductor (CMOS) processes improving. Furthermore, the variation of static power at runtime is intensifying since the operating temperature of microprocessor is elevating. These phenomena can result in the traditional power models is not suitable for the microprocessor produced in advanced-technology. In this thesis, we proposed a power model which considers and evaluates dynamic and static power simultaneously. This can increase the accuracy power model while it is applied to microprocessor with advanced technology. Also, we analyze the major performance counters which can be applied to evaluate static and dynamic power, respectively.