整合反鐵電操作及低臨界漏電流之低功耗負電容鐵電電晶體技術研發

Title:	整合反鐵電操作及低臨界漏電流之低功耗負電容鐵電電晶體技術研發 Development of Low-Power Ferroelectric Negative-Capacitance Transistor Integrated with Antiferroelectric Operation and Low Subthreshold Leakage
Authors:	張俊彥鄭淳護國立交通大學電子工程學系及電子研究所
Keywords:	;
Issue Date:	2016
Abstract:
Gov't Doc #:	MOST105-2221-E009-139-MY3
URI:	https://www.grb.gov.tw/search/planDetail?id=11876421&docId=484551 http://hdl.handle.net/11536/131790
Appears in Collections:	Research Plans

APA	張., & 鄭. (2016). 整合反鐵電操作及低臨界漏電流之低功耗負電容鐵電電晶體技術研發. http://hdl.handle.net/11536/131790.
Bibtex	@article{2016, title={整合反鐵電操作及低臨界漏電流之低功耗負電容鐵電電晶體技術研發}, author={張俊彥 and 鄭淳護}, journal={http://hdl.handle.net/11536/131790}, year={2016}, url={https://ir.lib.nycu.edu.tw/handle/11536/131790}, }