| Title: | Study of low-temperature and post-stress hysteresis in high-k gate dielectrics |
| Authors: | Wu, You-Lin Lin, Shi-Tin Yang, Chang Cheng Wu, Chien-Hung Chin, Albert 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
| Issue Date: | 2007 |
| URI: | http://hdl.handle.net/11536/135140 |
| ISBN: | 978-1-4244-1891-6 |
| Journal: | 2007 INTERNATIONAL SEMICONDUCTOR DEVICE RESEARCH SYMPOSIUM, VOLS 1 AND 2 |
| Begin Page: | 175 |
| End Page: | + |
| Appears in Collections: | Conferences Paper |
- Study of low-temperature and post-stress hysteresis in high-k gate dielectrics / Wu, You-Lin;Lin, Shi-Tin;Yang, Chang Cheng;Wu, Chien-Hung;Chin, Albert
- 沉積後電漿處理與退火製程對二氧化鉿熱穩定性之影響 / 湯鈞凱;Chun-Kai Tang;汪大暉;Ta-Hui Wang
- Stable Encapsulated Organic TFT With a Spin-Coated Poly(4-Vinylphenol-Co-Methyl Methacrylate) Dielectric / Zan, Hsiao-Wen;Hsu, Ting-Yu
- 電感耦合式電漿氮化和氟化處理對鉿矽化合物薄膜之影響 / 吳汶錦;Wu, Wen-Ching;張國明;桂正楣;Chang, Kow-Ming
- Investigation of Post-NBT Stress Current Instability Modes in HfSiON Gate Dielectric pMOSFETs by Measurement of Individual Trapped Charge Emissions / Ma, H. C.;Chiu, J. P.;Tang, C. J.;Wang, Tahui;Chang, C. S.
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