Title: Logic Block and Design Methodology for Via-Configurable Structured ASIC Using Dual Supply Voltages
Authors: Lin, Ta-Kai
Lin, Kuen-Wey
Chiu, Chang-Hao
Lin, Rung-Bin
資訊工程學系
Department of Computer Science
Keywords: Structured ASIC;Via configurable;Dual supply voltage;Low power;Standard cell;Level converter
Issue Date: 2014
Abstract: This paper presents a via-configurable logic block and a design methodology for realizing fine-grained dual-supply-voltage structured ASIC. Experiments with a 90nm process technology show that, given various timing budgets, our approach can achieve up to 44% energy reduction with 1.6% area overhead on level converters. Compared with GECVS, our approach converts up to 39% more high-supply voltage gates into low-supply voltage gates.
URI: http://dx.doi.org/10.1145/2591513.2591601
http://hdl.handle.net/11536/136154
ISBN: 978-1-4503-2816-6
ISSN: 1066-1395
DOI: 10.1145/2591513.2591601
Journal: GLSVLSI'14: PROCEEDINGS OF THE 2014 GREAT LAKES SYMPOSIUM ON VLSI
Begin Page: 111
End Page: 116
Appears in Collections:Conferences Paper