在微小溝槽架構中微觀薄膜填洞技術上的改良

Abstract

自從半導體發展以來，電晶體發展數量皆依尋著摩爾定律成長，每１８～２４個月可成長一倍。整個業界在過去半個世紀以來大抵皆照著此定律成長著。然而，隨著時代進步，人們追求著極小化的物理極限，因此許多半導體公司都在試圖改良電晶體的結構設計，以盡可能地延續著摩爾定律。

伴隨著縮小電晶體結構，在單位面積裡盡可能地擺放最大量的電晶體數目，整個半導體製程技術相對的也面臨嚴峻挑戰。就目前業界發展成熟的１０奈米技術而言，早期在28/45奈米使用的製程，將必須做大幅度的改良，方能在更微小的電晶體結構中，達成一樣高的產品良率。

本文將著重於薄膜技術的改良探討，從傳統的化學氣相沉積技術來探討在不同技術結點(Node)，一樣的製程卻有著足以影響電性的缺陷(Defect)。在此以鎢製程為舉例，從電晶體的鎢接點架構，來微觀填洞(GapFill)的效率。

Moore’s Law is a computing term which originated around 1970, the simplified version of this law states that processor speeds, or overall processing power for computers will double every two years.

To break down the law even further, it specifically stated that the number of transistors on an affordable CPU would double every two years but “more transistors” is more accurate.

For the technologies used in 45nm/28nm which have to be improved and modified in order to apply on narrower dimension of structure due to the strictly opening. The thesis elaborates the improved technology of thin film that are currently used in the industry. The research is based on tungsten application – contact plug fill, to explain the limitation of profile and the method to separate traditional deposition into three part of individual steps.

Finally, we will focus on the result of TEM/SEM on different generation and compare to the performance of Gapfill of different technology.