Device Structural Effects, SPICE Modeling and Circuit Evaluation for Negative-Capacitance FETs

Title:	Device Structural Effects, SPICE Modeling and Circuit Evaluation for Negative-Capacitance FETs
Authors:	Su, Pin You, Wei-Xiang 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
Issue Date:	1-Jan-2019
URI:	http://hdl.handle.net/11536/153670
ISBN:	978-1-7281-0942-8
ISSN:	1930-8868
Journal:	2019 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)
Begin Page:	0
End Page:	0
Appears in Collections:	Conferences Paper