Title: | MODELING THE POSITIVE-FEEDBACK REGENERATIVE PROCESS OF CMOS LATCHUP BY A POSITIVE TRANSIENT POLE METHOD .1. THEORETICAL DERIVATION |
Authors: | KER, MD WU, CY 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
Issue Date: | 1-Jun-1995 |
Abstract: | A novel method to characterize the mechanism of positive-feedback regeneration in a p-n-p-n structure during CMOS latchup transition is developed, It is based on the derived time-varying transient poles in large-signal base-emitter voltages of the lumped equivalent circuit of a p-n-p-n structure, Through calculating the time-varying transient poles during CMOS latchup transition, it is found that there exists a transient pole to change from negative to positive and then this pole changes to negative again, A p-n-p-n structure, which has a stronger positive-Feedback regeneration during turn-on transition, will lead to a larger positive transient pole, The time when the positive transient pole occurs during CMOS latchup transition is the time when the positive-feedback regeneration starts, By this positive transient pole, the positive-feedback regenerative process of CMOS latchup can he quantitatively characterized. |
URI: | http://hdl.handle.net/11536/1871 |
ISSN: | 0018-9383 |
Journal: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
Volume: | 42 |
Issue: | 6 |
Begin Page: | 1141 |
End Page: | 1148 |
Appears in Collections: | Articles |
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