An efficient memory architecture for motion estimation processor design

Title:	An efficient memory architecture for motion estimation processor design
Authors:	TZENG, EG LEE, CY 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
Issue Date:	1995
URI:	http://hdl.handle.net/11536/20030
ISBN:	0-7803-2570-2
ISSN:	0277-674X
Journal:	1995 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3
Begin Page:	712
End Page:	715
Appears in Collections:	Conferences Paper