| Title: | DESIGN OF ONE-DIMENSIONAL SYSTOLIC-ARRAY SYSTEMS FOR LINEAR STATE-EQUATIONS |
| Authors: | JEN, CW JOU, SJ 交大名義發表 電控工程研究所 National Chiao Tung University Institute of Electrical and Control Engineering |
| Issue Date: | 1-Jun-1990 |
| URI: | http://hdl.handle.net/11536/4094 |
| ISSN: | 0956-3768 |
| Journal: | IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS |
| Volume: | 137 |
| Issue: | 3 |
| Begin Page: | 185 |
| End Page: | 192 |
| Appears in Collections: | Articles |
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- DATA FLOW REPRESENTATION OF ITERATIVE ALGORITHMS FOR SYSTOLIC ARRAYS / JEN, CW;KWAI, DM
- DESIGN OF A SYSTOLIC ARRAY SYSTEM FOR LINEAR STATE-EQUATIONS / JOU, SJ;JEN, CW
- A systolic algorithm for solving dense linear systems / Lin, CJ
- ON THE DESIGN OF VLSI ARRAYS FOR DISCRETE FOURIER-TRANSFORM / LIU, CM;JEN, CW
- A systolic algorithm for solving dense linear systems / Lin, CJ
- Two systolic architectures for modular multiplication / Tsai, WC;Shung, CB;Wang, SJ
- ON EQUIVALENT SYSTOLIC DESIGNS OF LU DECOMPOSITION AND ITS ALGEBRAIC REPRESENTATION / HOU, YC;TSAY, JC
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