ON THE DESIGN OF VLSI ARCHITECTURES FOR PARALLEL EXECUTION OF DO LOOPS

Title:	ON THE DESIGN OF VLSI ARCHITECTURES FOR PARALLEL EXECUTION OF DO LOOPS
Authors:	CHEN, Z CHANG, CC CHIA, TL 資訊科學與工程研究所 Institute of Computer Science and Engineering
Issue Date:	1-Apr-1990
URI:	http://hdl.handle.net/11536/4132
ISSN:	0743-7315
Journal:	JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING
Volume:	8
Issue:	4
Begin Page:	393
End Page:	399
Appears in Collections:	Articles