應用於矽氧氮氧矽記憶體之單一晶界通道的低溫複晶矽薄膜電體之研究

Abstract

低溫複晶矽薄膜電晶體由於其高載子遷移率的特性成為顯示技術應用中的關鍵元件，在系統面板（System on Panel, SOP）與三維積體電路的實現具備應用潛力。然而，在系統面板的應用上除了需要高載子遷移率的運算單元外，也需要具有記憶功能的儲存單元，於是可微縮化的TFT-SONOS型記憶體成為值得研究的方向。 透過傳統準分子雷射退火方式可轉化非晶矽薄膜成為複晶矽，但此方法仍有些許缺點，如較狹窄的雷射製程條件、小晶粒與隨機分佈等等。在本篇論文中，我們利用梯台式通道結晶法(Elevated Channel Method)之側向結晶方式來製作控制晶界位置之複晶矽薄膜通道之薄膜電晶體的矽氧氮氧矽記憶體，另外，為了提昇閘極控制能力，我們還進一步結合了雙閘極的結構，並且對基本電特性、寫入/抹除速度、可靠度做詳細的分析及討論。 在第一部份中，我們提出一種稱為梯台式通道結晶法(Elevated Channel Method)之側向結晶方式，應用於製作可控制晶粒邊界位置之低溫複晶矽薄膜電晶體並加以探討。此種控制晶粒邊界位置技術之結晶機制為：當雷射照射在梯台式通道區並使得完全熔融時，氧化矽側壁有較厚之未熔融矽薄膜作為晶種，晶粒便會在梯台式通道區作側向成長。當雷射能量為620 mJ/cm2，梯台式通道區長度為1um、1.5um、2 um時，皆可在通道區形成單一主要晶粒邊界，然而當通道區長度為3um時，由於溫度逸散較快，無法在通道區形成單一主要晶粒邊界。其單閘極薄膜電晶體特性為場效載子移動率230cm2/V-s及次臨界擺幅0.116V/decade。為了提高對通道的控制能力，我們採用雙閘極的結構其薄膜電晶體特性為場效載子移動率488 cm2/V-s及次臨界擺幅0.083V/decade。 在第二部份中，利用第一部分所研究之單一晶界雙閘極SONOS型電晶體，我們利用FN穿隧來寫入/抹除資料研究他的記憶體特性，在雷射能量為620mJ/cm2、寫入電壓為Vg=15V、寫入時間為10ms時，他的操作窗口為2V。此外，我們發現結晶性在雷射能量為620mJ/cm2較600mJ/cm2與640mJ/cm2好，然而卻較突出，因此在雷射能量為620mJ/cm2、通道長度為1.5um時，單一晶界雙閘極SONOS型記憶體的寫入速度與抹除速度都較快。在重複寫入/抹除耐久性的表現上及可靠度方面，雖然操作窗口(window)較大，卻因為使用TEOS當作穿隧氧化層，而TEOS的品質較乾式氧化層差，容易產生缺陷；再加上因為通道中間的突起(protrusion)造成的局部大電場會對穿隧氧化層造成傷害，所以特性較為不理想。 結合上述兩部分的好處，可微縮化的單一晶界雙閘極SONOS型電晶體將成為未來整合型電路極中具有潛力的代表，以達到整合型基板的目標。

Low-temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) were the important devices in flat-panel displays, system on a panel (SOP), and three dimensional integrated circuits (3D-ICs) applications due to their high field-effect mobility. However, there was high performance of operating element as well as memory in the SOP, so the TFT-SONOS memory is worthy to investigate. Although amorphous silicon thin film can convert to polycrystalline silicon thin film by excimer laser crystallization, there were still some drawbacks such as narrow process window, random grain boundaries, etc. In this thesis, single grain boundary (SGB) double gate (DG) thin-film transistor (TFT) SONOS memory was fabricated by excimer laser annealing. In addition, the double-gated configuration was also studied. The electrical characteristics, programming and erasing characteristics, and reliability of SGB-DG-TFT-SONOS memory were studied and discussed in detail. In the first part, SGB-DG-TFT memory fabricated by excimer laser annealing was investigated. The mechanisms of elevated channel thin films were studied. In this method, a thick amorphous silicon region was formed in the both sides of elevated channel on the bottom gate which served as the seeds for the lateral grain growth during excimer laser irradiation. As the laser energy density was controlled to completely melt the thin region in the channel and partially melt the thick region near the corner, the lateral grain growth starting from the sides of elevated channel could progress along the direction toward the center of channel region. As the excimer laser energy was 620mJ/cm2 and the channel length was 1μm, 1.2μm, and1.5μm, there was only one longitudinal grain boundary in the center of the channel. Nevertheless, it cannot form a longitudinal grain boundary in the center of the channel with the channel length was 2μm and 3μm owing to the temperature dissipation. The electric characteristic of top gate structure, such as field-effect mobility is about 230cm2/V-s and the subthreshold swing is 0.116V/decade. To improve the gate controlling ability, we employ the double gate structure. The electric characteristic of top gate structure, such as field-effect mobility is about 488cm2/V-s and the subthreshold swing is 0.083V/decade. In the second part, to investigate and discuss the crystallinity of the device channel with excimer laser crystallized, we employed FN tunneling for programming and erasing operations in our device. The process window of SGB-DG-TFT-SONOS memory with excimer laser energy about 620mJ/cm2 and the programming voltage was 15V as the programming time of 10ms was 2V. Besides, we observed the better crystallinity of the device with excimer laser energy about 620mJ/cm2 compare with the device with excimer laser energy about 640mJ/cm2 and 600mJ/cm2. And the programming/ erasing speed of SGB-DG-TFT-SONOS memory with excimer laser energy about 620mJ/cm2 and the channel length was 1.5μm was faster. It should be noted, however, that the double-gated structure with ELC does not seem to improve the endurance characteristics and reliability characteristics of the device. The poor endurance and retention are ascribed to the poor quality of TEOS used for the tunneling oxide as well as the protrusion in the middle of the channel. The traps are easily generated because of poor quality of TEOS. Besides, high electric field due to the protrusion in the middle of the channel could damage the tunneling oxide. The benefits of the two parts I talked about above combined, SGB-DG-TFT-SONOS memories, will be the potential candidates of SOP in the future, therefore achieve their goal.