Title: 使用簡單的峰值電流鏡電路實現一低電壓低功率17ppm/C參考電壓電路
A Low-Voltage Low-Power 17 ppm/c Voltage Reference Using Simple Peaking Current Mirror Circuit
Authors: 吳政衛
Zheng-Wei Wu
鄭木火
Mu-Huo Cheng
電控工程研究所
Keywords: 弱反相區;峰值電流鏡;subthreshold;peaking current mirror
Issue Date: 2003
Abstract: 本論文提出一個新且非常簡單的低電壓低功率參考電壓電路。此參考電壓電路使用峰值電流鏡電路為主要架構, 由電流的正溫度係數經一電阻來補償金氧半導體閘-源極電壓的負溫度係數特性。由於峰值電流鏡電路之電晶體是工作在弱反相區, 因此整體電路所需的消耗功率非常小,而且此電路可允許操作於低電源電壓。此電路非常簡單,只需 6 個元件,4 個電晶體及 2 個電阻。本論文並以台積電 0.35 mu 3P3M SiGe BiCMOS 製程來實現此參考電壓電路。經後段模擬結果 (Post-Sim),本電路之最小工作電壓為 1.4 V,輸出電壓值為 710 mV, 溫度係數為 17 ppm/C,最大消耗功率是 6.68uW,電源電壓雜訊抑制比在1MHz時為 -84 dB。
This thesis presents a new and extremely simple low-voltage low-power voltage reference circuit. The voltage reference circuit uses the peaking current mirror circuit to extract the current with PTAT (proportional to absolute temperature), and then the current, through a resistor, is used to compensate for the gate-source voltage with the negative temperature coefficient. Since the transistors in the peaking current mirror circuit are operated in weak inversion (subthreshold region), both the power consumption and the required working supply voltage of the reference circuit are all low. The circuit only requires six elements, four transistors and two resistors. The proposed circuit is implemented using the TSMC 0.35um 3P3M SiGe BiCMOS technology. The design IC, after post simulation, attains the minimum supply voltage 1.4 V, output reference voltage 710 mv, temperature coefficient of 17 ppmC,$ power consumption 6.68 uW and power supply noise rejection ratio -84 dB at 1MHz.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009112568
http://hdl.handle.net/11536/45246
Appears in Collections:Thesis


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