超薄高介電常數金屬閘極層之互補式金屬氧化物半導體元件對於隨機電報雜訊的分析

Abstract

當CMOS 元件製程不斷進步，在通道中之電子亦隨之越來越少，單電子效應如Random Telegraph Noise(RTN)對元件造成之臨界電壓擾動亦越來越嚴重，近年更成為可靠度研究之主流題目。本次報告利用RTN 其物理特性，發展出一套對其缺陷位置的分析及萃取方法，更進一步對其位置分佈加以研究。最後，我們對其缺陷能階在無電場情況下(ET0)上去做萃取及分析方法，有了前述的方法，我們可以得到RTN的缺陷在位置以及能帶中的分佈情況。有助於未來對於此可靠性議題之研究。

As the scaling of the CMOS technology advances aggressively, the Random Telegraph Noise (RTN) becomes an important reliability issue.[1] Since RTN is a stochastic fluctuation between two levels of either the device drain current (ID) or threshold voltage (Vt) induced by trapping/de-trapping of a single charge in a gate trap. In this work, we demonstrate a method to extract RTN trap position both in vertical direction (channel surface to gate electrode) and lateral direction (source to drain). Therefore, the traps in gate dielectric can be profiled. Finally, we extract RTN trap energy at zero electric field condition (ET0) in vertical direction.