Title: 紋理壓縮與快取技術應用於高能源效率繪圖渲染器之設計與實現
Texture-Compression and -Cache Driven Schemes for an Energy-Efficient Rasterization Engine
Authors: 卓曉霜
Cho, Hsiao-Shuang
范倫達
Van, Lan-Da
資訊科學與工程研究所
Keywords: 繪圖渲染器;Rasterization Engine
Issue Date: 2011
Abstract: 在本篇論文中,提出基於群集概念的紋理壓縮和多層異質性的紋理快取技術實作於高能源效率繪圖渲染器,以期降低記憶體頻寬問題。紋理壓縮技術是結合了S3TC和k-means兩種演算法概念去改進,在可接受的繪圖品質下降低了六分之五的資料量,且實作結果比標準S3TC演算法的PSNR高約1.0 dB,更進一步針對硬體設計考量,解壓流程不需使用任何乘法器。另外多層快取技術考量了紋理壓縮概念,不僅有效地減少去外部記憶體提取資料的次數且只需使用小容量的快取記憶體實作,而此研究採用了第一層128位元組快取記憶體和第二層2K位元組快取記憶體在低解析度影像下可達到95%以上的命中率。結合以上兩種技術可有效地減輕記憶體頻寬問題而降低繪圖處理時間並且增進75%的能源使用效率。此篇論文所提出的繪圖渲染器架構實作在TSMC 90奈米製程,並在166M赫茲下提供了高能源效率處理達3.47 Mpixels/mJ。
In this thesis, an energy-efficient rasterization engine with cluster-based texture compression and multilevel heterogeneous texture cache schemes is presented to mitigate the bandwidth problem. The compression scheme is built on the S3TC and k-means clustering algorithms, and reduces five-sixth of data with acceptable compression quality. It outperforms standard S3TC in terms of PSNR with approximately 1.0 dB. Further, for hardware design consideration, the decompression is multiplier-free. The multilevel cache takes the texture compression into account, which not only allows small cache size but also decreases the frequency of fetching data from external memory. It has 128 bytes level-1 cache and 2KB level-2 cache, and the hit rate can achieve above 95% with lower image resolution. As a result, these two techniques effectively reduce the processing time of rasterization system to alleviate the memory bandwidth problem and enhance 75% energy efficiency. The proposed rasterization engine architecture is implemented in TSMC 90nm CMOS process and the energy efficiency achieves 3.47 Mpixels/mJ at 166 MHz.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079855540
http://hdl.handle.net/11536/48276
Appears in Collections:Thesis