砷化銦量子點在蕭基二極體與場效電晶體上之效應

Abstract

本論文呈獻蕭基二極體與場效電晶體內之量子點層捕捉/釋放電荷對量測電性特徵所造成影響之探討。蕭基二極體在低溫環境下之電流-電壓曲線中，可發現具量子點與無量子點之元件展現不同的導通行為，此差異可藉由將量子點層以等效電阻之模型取代解釋之。而在頻率相依之電容-電壓曲線量測結果中，也可觀察到由量子點層所導致之明顯特徵。根據實驗分析，能將此電容之特徵歸究於量子點內第一與第二能階對電荷之充-放電行為所造成。而量測所擷取出之載子捕捉/釋放速率則會隨溫度提高而上升。在場效電晶體元件上，則著重於兩種不同結構之研究。其中當二維電子氣通道位於量子點下方之結構，可能因為通道與閘極間之距離，致使閘極無法有效空乏通道內之載子。對於二維電子氣通道位於量子點上方之結構而言，雖說能空乏二維電子氣通道內之載子，但無論是在電流-電壓或電容-電壓量測中，都無法觀察到量子點下之能態充放電行為所造成之影響。為了能在將來實現以量子點為電荷儲存處之記憶元件，尚還需要更多之研究與探討。

This thesis present the study on how charge capturing/escaping of quantum dot (QD) layers affects measured the electrical characteristics of Schottky diodes and field effect transistors (FETs). For the Schottky diodes with QDs, the current-voltage (I-V) curves measured at low temperature exhibit different turn-on behavior from those without QDs, which can be explained by effective resistance model of QD layers. Clear features from QDs are observed with the frequency-dependent capacitance-voltage (C-V) results. According to our analysis, the C-V features can be attributed to the charging/discharging of QDs’ inter first and second energy levels.The extracted carrier capture/escape rate increases with increasing temperatures. For FETs, two sample structures are studied. The 2-D channel under the QD layers cannot be depleted by gate probably due to the distant gate metal. The other structure, although the 2-D channel can be well depleted, the charging states in the underneath QDs cannot be revealed either by I-V or C-V measurements. Further studies are needed to realize the QD-based memory device in the future.