複晶矽薄膜電晶體結構之研究

Abstract

針對一種使用電性感應層做為汲極的電場感應汲極結構所製成的複晶矽薄 膜電晶體特性來進行研究o 這種新的電場感應汲極薄膜電晶體是使用金屬 電極板來做為金屬閘極，將之覆在整個閘極補償區以控制閘極補償區的電 導性o 藉著電極板的適當偏壓，可使汲極電場平均 分佈，藉此不僅降 低了不正常的漏電流，也維持了高的開電流o 由金 屬閘極區於關閉狀態 下的能帶圖，我們發現最小關電流的電極板偏壓最佳值，發生在比汲極電 壓稍大時o 這種新的結構也減少了傳統緩衝閘極薄膜電晶體所需要的汲極 少量離子佈植，不僅免除了於佈植過程中所增加的缺陷，也使製程更簡化 和可重製o 薄膜電晶體經過氫鈍化處理後，37pA 的閉電流和 5E7 的開閉 電流比被成功製出o 而且，新的電場感應汲極薄膜電晶體不僅有較好的驅 動電流特性，更可免於校準時所造成的誤差，使製程更完善o The characteristics of polycrystalline silicon thin-film transistor (poly-Si TFT's) with a field-induction-drain (FID) structure using an electrically induced layer as a drain are investigated. The new FID-TFT employs a metal field plate as a metal-gate overlapping the entire offset-gate region to control the conductivity of the offset-gate region. By properly biasing the field plate voltage (Vfp) to distribute the drain electric field, the new FID structure not only reduces the anomalous leakage current, but also maintains a high ON current. From the band diagram of metal-gate region at the off-state, the optimized value of Vfp for the minimum Ioff is found to be a little larger than Vd. The new structure also eliminates the lightly-doped-drain implant required in the conventional offset- gate TFT's and is therefore free from an increased defects caused by the doping process, resulting in a simpler and more reproducible process. TFT's with an OFF current of 37 pA and an ON/OFF current ratio of 5E7 (Von=20 V, Voff=-10 V, Vd=5 V, Vfp=20 V) are successfully achieved after hydrogen passivation by using the FID structure. Moreover, the new FID-TFT's not only have better current drivability, but also are much immune to the misalignment errors, making them more robust in the processing.