用於非線性功率放大器之查表數位預失真技術

Abstract

數位預失真技術是補償功率放大器非線性失真裡較為有效的方法，其中在多項式法和查表法式為兩個較廣為人知的做法。而查表法有諸多優點，因此比較常用在實際的應用中。傳統的查表法是針對非記憶性功率放大器而設計，使用一維查表來做補償，本論文提出使用多維查表來對記憶性功率放大器做補償，由於記憶項越多時，查表的索引數會快速增加，因此我們提出了兩種降低索引數的方法，分別是解析度降低法與Lagrange內插法。此外為了再增進效能，我們提出了一種新的訓練方式，利用這種訓練方式可以得到更佳的內插結果。模擬的結果顯示我們所提的方法首先能夠有效地降低查表的索引數，並仍然能維持相同的補償效果，而所提出的訓練方式比起傳統的方式效果也有顯著的提升。

Digital predistortion (DPD) is known to be an effective method for the compensation of nonlinear distortion in power amplifiers. Two methods are well known in DPD, i.e, memory-polynomial and look-up-table (LUT). Due to its various advantages, the LUT method is preferable for real-world applications. Conventional LUT methods only consider one-dimensional (1D) LUT for memoryless PAs. This thesis proposes using multi-dimensional (MD) LUTs for PAs with memory. Since the size of the LUT will fast grow with the input dimension, two methods are proposed to reduce the size of the LUT, i.e, resolution-reduction and three-point Lagrange interpolation. To further enhance the performance, a new training method is also proposed. With the method, the interpolating weights can be well trained such that better interpolation performance can be obtained. Simulation results show that the proposed methods can effectively reduce the size of the MD LUT while maintaining the performance. Also, the proposed training method outperforms the conventional methods.