| Title: | 用於軟體無線電基頻處理之系統晶片設計技術-子計畫三：數位訊號處理器與可重置加速器之設計(III) The Design of DSP Processor Core and Configurable Accelerator(III) |
| Authors: | 劉志尉 Chih-WeiLiu 交通大學電子工程系 |
| Issue Date: | 2004 |
| Gov't Doc #: | NSC93-2220-E009-034 |
| URI: | http://hdl.handle.net/11536/90958 https://www.grb.gov.tw/search/planDetail?id=1031005&docId=196439 |
| Appears in Collections: | Research Plans |
