銅與低介電材料介電層之系統整合及可靠度提升研究(II)

Title:	銅與低介電材料介電層之系統整合及可靠度提升研究(II) The Reliability Enhancement for the Integrated System of Copper and Low K Dielectric Interconnect (II)
Authors:	邱碧秀 CHIOU BI-SHIOU 國立交通大學電子工程學系
Issue Date:	2003
Gov't Doc #:	NSC92-2216-E009-005
URI:	http://hdl.handle.net/11536/92183 https://www.grb.gov.tw/search/planDetail?id=828305&docId=156974
Appears in Collections:	Research Plans

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