銅與低介電材料介電層之系統整合及可靠度提升研究(I)

Title:	銅與低介電材料介電層之系統整合及可靠度提升研究(I) The Reliability Enhancement for the Integrated System of Copper and Low K Dielectric Interconnect (I)
Authors:	邱碧秀 CHIOU BI-SHIOU 交通大學電子工程系
Issue Date:	2002
Gov't Doc #:	NSC91-2216-E009-023
URI:	http://hdl.handle.net/11536/92794 https://www.grb.gov.tw/search/planDetail?id=785501&docId=151054
Appears in Collections:	Research Plans

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