Title: | 對以智財單元為基系統晶片設計之驗證與測試技術開發研究(III)---子計劃III:以智財單元為基系統晶片設計之測試技術研究 Testing Technology Development for IP-Based SoC Design(III) |
Authors: | 李崇仁 交通大學電子工程系 |
Issue Date: | 2002 |
Gov't Doc #: | NSC91-2215-E009-073 |
URI: | http://hdl.handle.net/11536/93004 https://www.grb.gov.tw/search/planDetail?id=784506&docId=150798 |
Appears in Collections: | Research Plans |
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