| Title: | 對以智財單元為基系統晶片設計之驗證與測試技術開發研究(III)---總計劃 Verification and Testing Technology Exploitation for IP-Based SoC Design(III) |
| Authors: | 李崇仁 交通大學電子工程系 |
| Issue Date: | 2002 |
| Gov't Doc #: | NSC91-2215-E009-078 |
| URI: | http://hdl.handle.net/11536/93055 https://www.grb.gov.tw/search/planDetail?id=784522&docId=150803 |
| Appears in Collections: | Research Plans |
Files in This Item:
If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.
