高性能晶片電感器與變壓器之設計特性分析與應用

Abstract

本計畫預計以三年的時間，分別完成高性能晶片電感器與變壓器之設計、特性分析 並應用於射頻積體電路設計上。首先，計劃第一年我們將利用電磁模擬軟體進行初步的 元件特性分析，經由獨特設計之晶圓測試結構萃取出矽晶圓的寬頻製程參數，便可針對 元件進行高頻傳輸行為之預測。而以往標準矽製程所製造出的電感器與變壓器普遍有著 品質因數(quality factor)與諧振頻率偏低的問題，我們將透過對金屬導線、氧化物絕緣層 及矽基板的電流密度與電磁場型的分析，搭配矽製程的多層次結構變換與佈局以提出新 式樣的電感器與變壓器設計。接著在計劃的第二年裡，我們將致力於發展準確的多埠 (multi-port)散射參數去嵌化技術以便得到更精確的高頻元件參數。延續以往在雙埠去嵌 化技術的經驗，搭配運用多埠網路分析與傳輸線理論，進而移除元件周圍的雜散寄生效 應。在計劃的第三年裡，將依據前兩年所得到的元件特性配合類神經網路及基因演算法 等技巧，進行模型建立並將其運用於射頻積體電路上。隨著無線通訊產品的廣泛運用， 各類通信標準相繼制定且規格愈趨嚴格，此更加突顯出關鍵元件研發之重要性，本計畫 之執行將可提高關鍵元件與電路性能，並達到產業技術提昇與人才培訓之目的，對國內 通訊技術成長與經濟發展作出貢獻。

The design, characterization and application of high-performance inductors and transformers will be established in this three-year project. In the first-year project, we will setup the electromagnetic simulation for the analysis of silicon-based RF devices. The broadband silicon-process parameters extracted from the on-wafer test structures will be used to predict the high-frequency transmission characteristics of the passive devices. In general, the conventional inductors and transformers fabricated in standard silicon technology suffer from the fact that they have poor quality factors and low resonance frequencies. In this project, we will investigate the current density and electromagnetic field distribution in the metal lines, oxide layers and silicon bulk. By employing the multi-level structure and layout technique, we will propose some ideas and improvements for on-chip inductors and transformers. In the second-year project, we’ll be devoted to developing accurate multi-port S-parameter de-embedding technique to obtain more precise high-frequency device parameters. With the utilization of multi-port network analysis and transmission-line theory, we can extend the two-port de-embedding concept to a multi-port system to subtract the parasitics surrounding the devices. In the third-year project, the artificial neural network and genetic algorithm will be used to train and learn from the data we already have in the previous two years, and the compact model for circuit application will be developed. The proposed new devices will also be implemented in some RFICs to further substantiate our claims. This three-year project will be helpful to the development of the communication technology in Taiwan.