A Flexible Geometric Mean Decomposition Processor for MIMO Communication Systems

Abstract

This paper presents a geometric-mean-decomposition (GMD) processor for multiple-input multiple-output (MIMO) communication systems. The proposed GMD pro cessor has a flexible architecture that supports channel matrices of arbitrary dimensions. A complex-valued bi-diagonalization is proposed at the preprocessing stage, which substantially reduces the overall hardware complexity. The proposed GMD processor naturally supports an economic channel state information (CSI) feedback mechanism, rendering it highly suitable for frequency-division- duplexing (FDD) systems. To illustrate the performance of the proposed architecture, we demonstrate an efficient implementation supporting 2 to 8 spatial streams in a 90-nm CMOS technology. The latency constraint of 16 mu s specified in the 802.11ac standard is adopted for this hardware realization. The chip integrates 437.7 K gates in 1.830 x 1.829 mm(2) and dissipates 125.5 mW at 66.67 MHz from a 1 V supply. Compared with the existing GMD implementations, this work supports GMD for matrices of larger dimensions with comparable silicon area, despite the added spatial information feedback capability. Index Terms-CORDIC, geometric mean decomposition