標題: | 有效地佈署訊號轉換偵測器以實現針對老化的容忍機制 Cost-Effective Transition Detector Deployment for Aging Resili-ence |
作者: | 張皓淳 吳凱強 Chang, Hao-Chun Wu, Kai-Chiang 資訊科學與工程研究所 |
關鍵字: | 剃刀正反器;訊號轉換偵測器;易錯誤路徑;訊號到達率;預測錯誤率;Razor flip-flop;Transition detector;Vulnerable path;Sensitization rate;Misprediction rate |
公開日期: | 2017 |
摘要: | 裝置老化導致電路性能和壽命有顯著的損耗,一直是納米級設計可靠度降低的主要因素。而積極的技術縮放趨勢,如較薄的柵極氧化物,不會使電源電壓成比例縮小,會加劇老化的影響,從而在早期設計階段需要一個老化感知的可靠性驗證和優化框架。在本文中,我們提出基於部署訊號轉換檢測器來利用時序推測的老化韌性。我們通過現有的MAX-SAT解算器來解決部署問題,我們可以藉由部署更少數量的訊號偵測器,取代大量的剃須刀觸發器達到相似程度的老化彈性,我們實現了一個有效減少成本且性能損失微乎其微的目標。實驗結果表明,與天真的剃刀觸發器部署相比,性能下降了1-5%,同時將所需的剃刀觸發器數量減少了70%以上。 Device aging, which causes significant loss on circuit performance and lifetime, has been a primary factor in reliability degradation of nanoscale designs. Aggressive technology scaling trends, such as thinner gate oxide without proportional downscaling of supply voltage, aggravate the aging impact and thus necessitate an aging-aware reliability verification and optimization framework during early design stages. In this paper, we propose to exploit timing speculation for aging resilience, based on deploying transition detector. We formulate the deployment problem to an exact set cover problem and solve it by an existing MAX-SAT solver, we can deploy lesser number of transition detectors instead a large number of Razor flip-flops with similar degree of aging resilience, we can achieve the goal of cost-effective with an insignificant performance loss. Experimental results show that 1-5% performance loss, while reducing the number of required Razor flip-flops by more than 70%, as compared to the case of naïve Razor flip-flop deployment |
URI: | http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070456130 http://hdl.handle.net/11536/141938 |
顯示於類別: | 畢業論文 |