標題: | Systematic layout planning: a study on semiconductor wafer fabrication facilities |
作者: | Yang, TH Su, CT Hsu, YR 交大名義發表 National Chiao Tung University |
關鍵字: | layout;semiconductors;material handling;analytical hierarchy process;decision making |
公開日期: | 2000 |
摘要: | This paper proposes to use Muther's systematic layout Planning Procedure as the infrastructure to solve a fab layout design problem. A multiple objective decision making;ng tool, analytic hierarchy process, is then proposed to evaluate the design alternatives. The proposed procedure is illustrated to be a viable approach for solving a fab layout design problem through a real-world case study. It features both the simplicity of the design Process and the objectivity of the multiple-criteria evaluation process as opposed to existing solution methodologies. |
URI: | http://hdl.handle.net/11536/14531 |
ISSN: | 0144-3577 |
期刊: | INTERNATIONAL JOURNAL OF OPERATIONS & PRODUCTION MANAGEMENT |
Volume: | 20 |
Issue: | 11-12 |
起始頁: | 1360 |
結束頁: | 1372 |
顯示於類別: | 期刊論文 |