標題: | Current-Aware Flash Scheduling for Current Capping in Solid State Disks |
作者: | Chang, Li-Pin Cheng, Chia-Hsiang Chang, Shu-Ting Chou, Po-Han 資訊工程學系 Department of Computer Science |
關鍵字: | Current measurement;Parallel processing;SDRAM;Current supplies;Throughput;Aging;Time factors;Flash memory management;power management;solid state disks (SSDs) |
公開日期: | 1-二月-2020 |
摘要: | Solid state disks (SSDs) employ internal parallelism to boost their input/output (I/O) performance, but a high degree of flash parallelism inevitably consumes a high level of current. To budget power or support multiple power sources, system software may force an SSD into a new power mode that has a specific current supply limit. This paper introduces a firmware approach to optimize SSD internal parallelism subject to a current supply limit. The proposed method involves two steps. First, we constructed current models of flash operations on the basis of real-world measurement results. Second, we designed a firmware scheduler to determine the actual starting time of each flash operation. The proposed scheduler accounted for flash aging, process variation, and internal resource contention, and it avoided any current cap violation by checking a few time points instead of every unit of time. Our experimental results indicated that the proposed approach outperformed existing methods with respect to I/O response time and throughput under realistic workloads. |
URI: | http://dx.doi.org/10.1109/TCAD.2018.2887046 http://hdl.handle.net/11536/153811 |
ISSN: | 0278-0070 |
DOI: | 10.1109/TCAD.2018.2887046 |
期刊: | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
Volume: | 39 |
Issue: | 2 |
起始頁: | 321 |
結束頁: | 334 |
顯示於類別: | 期刊論文 |