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dc.contributor.authorKola, Sekhar Reddyen_US
dc.contributor.authorLi, Yimingen_US
dc.contributor.authorThoti, Narasimhuluen_US
dc.date.accessioned2020-05-05T00:02:22Z-
dc.date.available2020-05-05T00:02:22Z-
dc.date.issued2020-04-01en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.7567/1347-4065/ab5b7cen_US
dc.identifier.urihttp://hdl.handle.net/11536/154173-
dc.description.abstractUsing a dual spacer consisting of 50% SiO2 and 50% HfO2, the ratio of the on-state current/the off-state current in the order of 10(6) is achieved for the explored devices. Based on the experimentally validated simulation, the result indicates that the variation of gate-capacitance is significant owing to the sizeable parasitic capacitance resulting from the spacer. The role of the spacer acts as the parallel plate capacitor, the amount of gate capacitance will be increased largely with the HfO2 due to its high parasitic capacitance. For the devices without any spacers, induced by a donor-type single charge trap (SCT), the statistically calculated highest amplitude of random telegraph noise (RTN) is 2.32%. It occurs when the SCT locates in the middle of the channel due to the high occurrence of capture and emission for SCT under low gate voltage. Notably, for devices with considerable spacers, the RTN can be significantly suppressed (<= 1%). (C) 2020 The Japan Society of Applied Physicsen_US
dc.language.isoen_USen_US
dc.titleEffects of a dual spacer on electrical characteristics and random telegraph noise of gate-all-around silicon nanowire p-type metal-oxide-semiconductor field-effect transistorsen_US
dc.typeArticleen_US
dc.identifier.doi10.7567/1347-4065/ab5b7cen_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICSen_US
dc.citation.volume59en_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電機工程學系zh_TW
dc.contributor.department電信工程研究所zh_TW
dc.contributor.department電機資訊國際碩士學位學程zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Electrical and Computer Engineeringen_US
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.contributor.departmentEECS International Graduate Program-Masteren_US
dc.identifier.wosnumberWOS:000519630000007en_US
dc.citation.woscount0en_US
Appears in Collections:Articles