標題: | Programmable FIR filter with adder-based computing engine |
作者: | Kuo, Yu-Ting Lin, Tay-Jyi Cho, Yi Liu, Chih-Wei Jen, Chein-Wei 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2006 |
摘要: | This paper presents a programmable FIR core with a compact adder-based computing engine and an automatic code generator. The FIR core saves 50% area of 'conventional MAC-based cores in the 0.13 mu m implementation. Besides, the complexity-aware code generator synthesizes optimized FIR programs for a user-defined sampling period. It explores an optimal scaling factor with common subexpression elimination automatically. In our simulations, the proposed approach reduces about 10%similar to 18% computing time of MAC-based FIR cores with comparable filtering performance. |
URI: | http://hdl.handle.net/11536/17259 |
ISBN: | 978-0-7803-9389-9 |
ISSN: | 0271-4302 |
期刊: | 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS |
起始頁: | 1756 |
結束頁: | 1759 |
顯示於類別: | 會議論文 |