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dc.contributor.authorShih, YCen_US
dc.contributor.authorWu, CYen_US
dc.date.accessioned2014-12-08T15:27:12Z-
dc.date.available2014-12-08T15:27:12Z-
dc.date.issued1999en_US
dc.identifier.isbn0-7803-5471-0en_US
dc.identifier.urihttp://hdl.handle.net/11536/19422-
dc.description.abstractAn 128x128 high-performance CMOS image sensor is designed by using shared-buffer direct injection (SBDI) biasing technique and shared off-focal-plane-array (off-FPA) integration capacitor structure [1]-[2]. Each pixel contains only a photodiode and a MOS switch. The pixel size is 30x30 mu m(2) and can be further shrunk. Due to the new SBDI biasing technique, the linearity and the dynamic range of the CMOS image sensor are increased. The use of shared off-FPA integration capacitor leads to large charge capacity and dynamic range. The CMOS image sensor has charge capacity of 5x10(7) electrons, transimpedance of 5x10(8) ohms at 20nA background current, and power dissipation of 30mW under 5V power supply. Moreover, the current-mode background suppression and dynamic discharge source follower output stage are proposed to further increase the signal dynamic range and improve the speed performance of output stage. The designed CMOS image sensor is fabricated by 0.5 mu m double-poly double-metal (DPDM) n-well CMOS technology. The function and performance of the proposed CMOS image sensor have been verified by experimental results.en_US
dc.language.isoen_USen_US
dc.titleThe design of high-performance 128Xi28 CMOS image sensors using new current-readout techniquesen_US
dc.typeProceedings Paperen_US
dc.identifier.journalISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 5: SYSTEMS, POWER ELECTRONICS, AND NEURAL NETWORKSen_US
dc.citation.spage168en_US
dc.citation.epage171en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000081715600042-
Appears in Collections:Conferences Paper