Skip to main content
Log In
Communities & Collections
All of DSpace
Statistics
Home
學術出版;;Publications
會議論文;;Conferences Paper
On designing of 4-valued memory with double-gate TFT
On designing of 4-valued memory with double-gate TFT
Loading...
Date
1995
Authors
Lee, CL
Chern, HN
Liao, MS
Wang, HM
Journal Title
Journal ISSN
Volume Title
Publisher
DOI
Abstract
Description
Keywords
multi-valued logic
,
double-gate thin film transistor
,
SRAM
,
circuit design
Citation
URI
https://ir.lib.nycu.edu.tw/handle/11536/20013
Collections
會議論文;;Conferences Paper
Endorsement
Review
Supplemented By
Referenced By
Full item page