以記憶體為基底的嵌入式儲存系統之設計與研究

Abstract

由於輕、薄、短、小及省電的要求，許多消費性民生電子產品或嵌入式設備都使用具有電池供電的記憶體或快閃記憶體來儲存資料。傳統的儲存系統都是考量硬碟的特性來做最佳化的設計，然而記憶體及快閃記憶體的特性與硬碟截然不同，因此儲存系統有重新設計的必要。例如，以快閃記憶體為基底的儲存系統必需克服來自硬體的限制：快閃記憶體寫入時間比讀取時間慢、儲存區要先被抹除後才能再被寫入，以及有寫入次數的限制。而以記憶體為基底的儲存系統要能保護所儲存的資料，以避免資料的毀壞或不一致。 在本論文□，針對記憶體的特性我們設計了一個以記憶體為基底的物件儲存系統，此系統使用了改良的夥伴系統 (buddy system) 來減少內部零碎 (internal fragmentation)，並且利用資料壓縮技術來減少對儲存空間的需求，以及提供交易處理 (transaction processing) 來保持資料的一致性。實驗顯示此系統不僅能有效地管理有限的儲存空間，並且能很有效率地存取物件。 此外，針對快閃記憶體的特性，我們提出一個新的儲存空間管理方式，並且分析與設計了許多清除策略，目的是要對儲存區做均衡的抹除，以及減少抹除的動作。透過實作與模擬實驗證明，此儲存空間管理方式配合有效率的清除策略，不僅能大幅地提升系統的效能，亦能延長快閃記憶體的使用壽命，以及減少耗電量。

Due the requirements of small size, light weight, and low power consumption, several consumer electronics or embedded devices use battery-backed RAM or flash memory to replace hard disk drives for data storage. However, conventional storage system designs are all optimized toward hard disks while RAM and flash memory are totally different from hard disks. These hardware characteristics impose the need of redesigning storage systems for them. For example, storage systems should overcome the limitations of flash memory such as write access times higher than read access times, the need to erase flash memory before rewriting it, and a limited number of erase cycles in the lifetime of the device. Data stored in battery-backed RAM must be carefully guarded against power and crashes to refrain from losing information or data corruption. In this thesis, we have designed and implemented a RAM-based object storage system that takes advantage of memory characteristics and uses RAM-based storage efficiently. An enhanced buddy system is employed to reduce internal fragmentation. Data compression is used to reduce storage space requirements and transaction processing is provided for data consistency and fault recovery. Performance evaluations show that this storage system is efficient in object access and in utilizing limited storage space. For flash memory research, we have proposed the partitioned log-based flash memory management method. Various cleaning policies are analyzed and newly proposed, in order to reduce the number of erase operations performed on flash memory and to evenly wear the flash memory. Empirical evaluations through practical implementation and trace-driven simulations show that system throughput is largely improved, flash memory lifetime is substantially prolonged, and power consumption is greatly reduced.