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非同步處理器模擬器的設計與資料危障問題的研究
非同步處理器模擬器的設計與資料危障問題的研究
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902213E009155.pdf
(1.06 MB)
902213E009155.pdf
(1.06 MB)
Date
2001
Authors
陳昌居
CHEN CHANG-JIU
Journal Title
Journal ISSN
Volume Title
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Abstract
Description
Keywords
非同步處理器
,
資料相依
,
模擬器
,
Asynchronous processor
,
Data dependence
,
Simulator
Citation
URI
https://www.grb.gov.tw/search/planDetail?id=656149&docId=123877
https://ir.lib.nycu.edu.tw/handle/11536/93690
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