Browsing by Author "Bor, JC"

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Analog electronic cochlea design using multiplexing switched-capacitor circuits
(1996-01-01)
Bor, JC
;
Wu, CY
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電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A new design methodology is proposed to realize a real cochlea using the multiplexing switched-capacitor (SC) circuits, The proposed technique is based upon the transmission-line model proposed by Zwislocki [5], At the cost of the increase in the number of clock phases, the decay rate in the transition region of the filter section can be increased by adding only a few components, Therefore, the components and chip area of the designed silicon cochlea can be small, An experimental chip containing four filter sections has been designed and fabricated, The measured frequency responses from the 32-section cochlea formed by cascading nine fabricated chips are consistent with both theoretical calculation results and observed behavior of a real cochlea, Moreover, the designed silicon cochlea has the dynamic range of 67 dB in each section and a low sensitivity to process variations, Thus it is suitable for VLSI (very large scale integration) implementation with the associated neural network.
Pulse-width-modulation feedforward neural network design with on-chip learning
(1996)
Bor, JC
;
Wu, CY
;
交大名義發表
;
電子工程學系及電子研究所
;
National Chiao Tung University
In this paper, a CMOS VLSI design of the pulse width modulation (PWM) neural network with on-chip leaning is proposed. The multiplication and summation functions are realized by using the PWM technique and simple mixed-mode circuits with good linearity and large dynamic range. From the measured results, the linearity of synapses versus input pulse widths can be almost kept under +/-0.2%. Also the measured results on the simple Chinese word speech classification have successfully verified the function-correctness and performance of the designed neural network.